LCMXO2280C-5TN144C LATTICE SEMICONDUCTOR, LCMXO2280C-5TN144C Datasheet - Page 175

MACHXO PLD FLASH, SCRAM 1.8V, SMD

LCMXO2280C-5TN144C

Manufacturer Part Number
LCMXO2280C-5TN144C
Description
MACHXO PLD FLASH, SCRAM 1.8V, SMD
Manufacturer
LATTICE SEMICONDUCTOR
Series
MachXOr
Datasheet

Specifications of LCMXO2280C-5TN144C

Cpld Type
FLASH
No. Of Macrocells
1140
No. Of I/o's
113
Propagation Delay
3.6ns
Global Clock Setup Time
1.1ns
Frequency
600MHz
Supply Voltage Range
1.71V To 3.465V
Operating
RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LCMXO2280C-5TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LCMXO2280C-5TN144C
Manufacturer:
LATTICE/莱迪斯
Quantity:
20 000
Lattice Semiconductor
Assume M =1
Then:
In this case, V = 6 will satisfy all conditions.
Oscillator (OSCC)
There is a dedicated oscillator in the MachXO device whose output is made available for user.
The oscillator frequency range is 18 to 26 MHz. The output of the oscillator can also be routed as an input clock to
the clock tree. The oscillator frequency output can be further divided by internal logic (user logic) for lower frequen-
cies, if desired. The oscillator is powered down when not in use.
Primitive Name: OSCC
Table 10-6. OSCC Port Definition
Figure 10-9. Oscillator Primitive Symbol (OSCC)
Oscillator Usage with VHDL - Example
COMPONENT OSCC
END COMPONENT;
begin
OSCInst0: OSCC
Clock/Control Distribution Network
The MachXO family provides global clocks: four primary clocks and four secondary clocks. These global signals
are generated from four 16:1 muxes as shown in Figure 10-10 and Figure 10-11. The available clock sources for
the MachXO256 and MachXO640 devices are four dual function clock pins and 12 internal routing signals. The
available clock sources for the MachXO2280 devices are four dual function clock pins, six internal routing signals
and six PLL outputs.
Dual function I/Os are provided for clocking usage. These I/Os are used as user programmable I/O pins when not
in use as PLL or clock pins.
f
f
f
f
f
PFD
OUT
VCO
PFD
VCO
= 40 / 2 = 20 or 60 / 3 = 20 . . . . . . . . . . . . . . . . . . . . . . . out of range
= 40 /1 or 120 /3 = 40 . . . . . . . . . . . . . . . . . . . . . . . . . . .within range
= 40*3/1 = 120 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .within range
= 120 * 4 = 480 . . . . . . . . . . . within range but not an optimum value
= 120*6 = 720 < 840
PORT (OSC:OUT
PORT MAP (
OSC
);
=>
osc_int
Output
std_logic);
I/O
Name
OSC
OSCC
10-13
OSC
Oscillator Clock Output
Description
Design and Usage Guide
MachXO sysCLOCK PLL

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