LCMXO2280C-5TN144C LATTICE SEMICONDUCTOR, LCMXO2280C-5TN144C Datasheet - Page 149

• Manufacturer Part Number: LCMXO2280C-5TN144C
• Description: MACHXO PLD FLASH, SCRAM 1.8V, SMD
• Manufacturer: LATTICE SEMICONDUCTOR
• Series: MachXOr

Specifications of LCMXO2280C-5TN144C

• Cpld Type: FLASH
• No. Of Macrocells: 1140
• No. Of I/o's: 113
• Propagation Delay: 3.6ns
• Global Clock Setup Time: 1.1ns
• Frequency: 600MHz
• Supply Voltage Range: 1.71V To 3.465V
• Operating: RoHS Compliant

Lattice Semiconductor
A clock is always required, as only synchronous write is supported. The various ports and their definitions for the
FIFO_DC are listed in Table 9-11.
Table 9-11. EBR-based FIFO_DC Memory Port Definitions
Reset (RST) resets only the input and output registers of the RAM. It does not reset the contents of the memory.
The various supported sizes for the FIFO_DC for MachXO are listed in Table 9-12.
Table 9-12. MachXO FIFO_DC Data Widths Sizes
Table 9-13 shows the various attributes available for the FIFO_DC. Some of these attributes are user-selectable
through the IPexpress GUI. For detailed attribute definitions, refer to Appendix A.
Generated Module
Port Name in
CLKW
CLKR
RST
WE
DO
RE
AF
EF
AE
FF
DI
FIFO Size
512 x 18
256 x 36
8K x 1
4K x 2
2K x 4
1K x 9
Port Name in Primitive
Input Data
DI[17:0]
DI[35:0]
DI[1:0]
DI[3:0]
DI[8:0]
9-26
DI
Memory Usage Guide for MachXO Devices
Read Port Clock
Write Port Clock
Almost Full Flag
Almost Empty
Read Enable
Write Enable
Description
Data Output
Empty Flag
Data Input
Full Flag
Reset
Output Data
DO[17:0]
DO[35:0]
DO[1:0]
DO[3:0]
DO[8:0]
DO
Rising Clock Edge
Rising Clock Edge
Active State
Active High
Active High
Active High
Active High
Active High
Active High
Active High
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