MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 221

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

10.5.1 CPSM Registers
10.6 Free-Running Counter Submodule (FCSM)
MC68336/376
USER’S MANUAL
The CPSM contains a control register (CPCR) and a test register (CPTR). All unused
bits and reserved address locations return zero when read. Writes to unused bits and
reserved address locations have no effect. Refer to D.7.4 CPSM Control Register
and D.7.5 CPSM Test Register for information concerning CPSM register and bit de-
scriptions.
The free-running counter submodule (FCSM) has a 16-bit up counter with an associ-
ated clock source selector, selectable time-base bus drivers, control registers, status
bits, and interrupt logic. When the 16-bit up counter overflows from $FFFF to $0000,
an optional overflow interrupt request can be generated. The current state of the 16-
bit counter is the primary output of the counter submodules. The user can select which,
if any, time base bus is to be driven by the 16-bit counter. A software control register
selects whether the clock input to the counter is one of the taps from the prescaler or
an input pin. The polarity of the external input pin is also programmable.
In order to count, the FCSM requires the CPSM clock signals to be present. After re-
set, the FCSM does not count until the prescaler in the CPSM starts running (when the
software sets the PRUN bit). This allows all counters in the CTM4 submodules to be
synchronized.
The CTM4 has one FCSM. Figure 10-3 shows a block diagram of the FCSM.
INPUT PIN
CTM2C
6 CLOCKS (PCLK[1:6]) FROM PRESCALER
SUBMODULE BUS
DETECT
EDGE
Figure 10-3 FCSM Block Diagram
CONFIGURABLE TIMER MODULE 4
TBBA
CONTROL REGISTER BITS
IN
TBBB
SELECT
CLK2
CLOCK
CLK1 CLK0
16-BIT UP COUNTER
SELECT
BUS
CONTROL REGISTER BITS
COF
TIME BASE BUSES
CONTROL REGISTER BITS
DRVA DRVB
OVERFLOW
IL2
IL1
IL1
IL0
INTERRUPT
CONTROL
IARB3
MOTOROLA
CTM FCSM BLOCK
10-5