MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 273

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

13.6.2 Low-Power Stop Mode
MC68336/376
USER’S MANUAL
Once debug mode is exited, the TouCAN will resynchronize with the CAN bus by wait-
ing for 11 consecutive recessive bits before beginning to participate in CAN bus com-
munication.
Before entering low-power stop mode, the TouCAN will wait for the CAN bus to be in
an idle state, or for the third bit of intermission to be recessive. The TouCAN then waits
for the completion of all internal activity (except in the CAN bus interface) to be com-
plete. Afterwards, the following events occur:
To exit low-power stop mode:
When in low-power stop mode, a recessive to dominant transition on the CAN bus
causes the WAKEINT bit in the error and status register (ESTAT) to be set. This event
can generate an interrupt if the WAKEMSK bit in CANMCR is set.
Consider the following notes regarding low-power stop mode:
• The TouCAN shuts down its clocks, stopping most internal circuits, thus achieving
• The bus interface unit continues to operate, allowing the CPU32 to access the
• The TouCAN ignores its RX pins and drives its TX pins as recessive.
• The TouCAN loses synchronization with the CAN bus, and the STOPACK and
• Reset the TouCAN either by asserting one of the IMB reset lines or by asserting
• Clear the STOP bit in CANMCR.
• The TouCAN module can optionally exit low-power stop mode via the self-wake
• When the self-wake mechanism activates, the TouCAN tries to receive the frame
• If the STOP bit is set while the TouCAN is in the bus off state, then the TouCAN
• To place the TouCAN in low-power stop mode with the self-wake mechanism
• To take the TouCAN out of low-power stop mode when the self-wake mechanism
• The SELFWAKE bit should not be set after the TouCAN has already entered low-
maximum power savings.
module configuration register.
NOTRDY bits in the module configuration register are set.
the SOFTRST bit CANMCR.
mechanism. If the SELFWAKE bit in CANMCR was set at the time the TouCAN
entered stop mode, then upon detection of a recessive to dominant transition on
the CAN bus, the TouCAN clears the STOP bit in CANMCR and its clocks begin
running.
that woke it up. (It assumes that the dominant bit detected is a start-of-frame bit).
It will not arbitrate for the CAN bus at this time.
will enter low-power stop mode and stop counting recessive bit times. The count
will continue when STOP is cleared.
engaged, write to CANMCR with both STOP and SELFWAKE set, then wait for
the TouCAN to set the STOPACK bit.
is enabled, write to CANMCR with both STOP and SELFWAKE clear, then wait
for the TouCAN to clear the STOPACK bit.
power stop mode.
CAN 2.0B CONTROLLER MODULE (TouCAN)
MOTOROLA
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