MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 397

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

CH[15:0] — Encoded Host Sequence
D.8.9 Host Service Request Registers
HSSR0 — Host Service Request Register 0
HSSR1 — Host Service Request Register 1
CH[15:0] — Encoded Type of Host Service
D.8.10 Channel Priority Registers
CPR0 — Channel Priority Register 0
CPR1 — Channel Priority Register 1
MC68336/376
USER’S MANUAL
15
15
15
15
0
0
0
0
RESET:
RESET:
RESET:
RESET:
The host sequence field selects the mode of operation for the time function selected
on a given channel. The meaning of the host sequence bits depends on the time
function specified.
The host service request field selects the type of host service request for the time
function selected on a given channel. The meaning of the host service request bits
depends on the time function specified.
A host service request field cleared to %00 signals the host that service is completed
by the microengine on that channel. The host can request service on a channel by
writing the corresponding host service request field to one of three non-zero states.
The CPU32 should monitor the host service request register until the TPU clears the
service request to %00 before any parameters are changed or a new service request
is issued to the channel.
CH 15
CH 15
CH 7
CH 7
14
14
14
14
0
0
0
0
13
13
13
13
0
0
0
0
CH 14
CH 14
CH 6
CH 6
12
12
12
12
0
0
0
0
11
11
11
11
0
0
0
0
CH 13
CH 13
CH 5
CH 5
10
10
10
10
0
0
0
0
REGISTER SUMMARY
9
0
9
0
9
0
9
0
CH 12
CH 12
CH 4
CH 4
8
0
8
0
8
0
8
0
7
0
7
0
7
0
7
0
CH 11
CH 11
CH 3
CH 3
6
0
6
0
6
0
6
0
5
0
5
0
5
0
5
0
CH 10
CH 10
CH 2
CH 2
4
0
4
0
4
0
4
0
3
0
3
0
3
0
3
0
CH 9
CH 1
CH 9
CH 1
2
0
2
0
2
0
2
0
$YFFE1A
$YFFE1C
$YFFE1E
$YFFE18
MOTOROLA
1
0
1
0
1
0
1
0
CH 8
CH 0
CH 8
CH 0
D-79
0
0
0
0
0
0
0
0