MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 61

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

4.4 Virtual Memory
4.5 Addressing Modes
4.6 Processing States
MC68336/376
USER’S MANUAL
The full addressing range of the CPU32 on the MC68336/376 is 16 Mbytes in each of
eight address spaces. Even though most systems implement a smaller physical mem-
ory, the system can be made to appear to have a full 16 Mbytes of memory available
to each user program by using virtual memory techniques.
A system that supports virtual memory has a limited amount of high-speed physical
memory that can be accessed directly by the processor and maintains an image of a
much larger virtual memory on a secondary storage device. When the processor at-
tempts to access a location in the virtual memory map that is not resident in physical
memory, a page fault occurs. The access to that location is temporarily suspended
while the necessary data is fetched from secondary storage and placed in physical
memory. The suspended access is then restarted or continued.
The CPU32 uses instruction restart, which requires that only a small portion of the in-
ternal machine state be saved. After correcting the fault, the machine state is restored,
and the instruction is fetched and started again. This process is completely transpar-
ent to the application program.
Addressing in the CPU32 is register-oriented. Most instructions allow the results of the
specified operation to be placed either in a register or directly in memory. There is no
need for extra instructions to store register contents in memory.
There are seven basic addressing modes:
The register indirect addressing modes include postincrement, predecrement, and off-
set capability. The program counter indirect mode also has index and offset capabili-
ties. In addition to these addressing modes, many instructions implicitly specify the
use of the status register, stack pointer, and/or program counter.
The processor is always in one of four processing states: normal, exception, halted, or
background. The normal processing state is associated with instruction execution; the
bus is used to fetch instructions and operands and to store results.
• Register Direct
• Register Indirect
• Register Indirect with Index
• Program Counter Indirect with Displacement
• Program Counter Indirect with Index
• Absolute
• Immediate
CENTRAL PROCESSOR UNIT
MOTOROLA
4-9