MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 71

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

4.10.3 Enabling BDM
4.10.4 BDM Sources
MC68336/376
USER’S MANUAL
Accidentally entering BDM in a non-development environment can lock up the CPU32
when the serial command interface is not available. For this reason, BDM is enabled
during reset via the breakpoint (BKPT) signal.
BDM operation is enabled when BKPT is asserted (low), at the rising edge of RESET.
BDM remains enabled until the next system reset. A high BKPT signal on the trailing
edge of RESET disables BDM. BKPT is latched again on each rising transition of
RESET. BKPT is synchronized internally, and must be held low for at least two clock
cycles prior to negation of RESET.
BDM enable logic must be designed with special care. If hold time on BKPT (after the
trailing edge of RESET) extends into the first bus cycle following reset, the bus cycle
could inadvertently be tagged with a breakpoint. Refer to the SIM Reference Manual
(SIMRM/AD) for timing information.
When BDM is enabled, any of several sources can cause the transition from normal
mode to BDM. These sources include external breakpoint hardware, the BGND
instruction, a double bus fault, and internal peripheral breakpoints. If BDM is not en-
abled when an exception condition occurs, the exception is processed normally.
TARGET
SYSTEM
TARGET
SYSTEM
Figure 4-8 Common In-Circuit Emulator Diagram
Figure 4-9 Bus State Analyzer Configuration
TARGET
MCU
CENTRAL PROCESSOR UNIT
IN-CIRCUIT
EMULATOR
TARGET
MCU
BUS STATE
ANALYZER
MOTOROLA
4-19
1128A
1129A