MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 407

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

BOFFMSK — Bus Off Interrupt Mask
ERRMSK — Error Interrupt Mask
RXMODE[1:0] — Receive Pin Configuration Control
TXMODE[1:0] — Transmit Pin Configuration Control
MC68336/376
USER’S MANUAL
CANRX1
CANRX0
NOTES:
Pin
The BOFFMSK bit provides a mask for the bus off interrupt.
The ERRMSK bit provides a mask for the error interrupt.
These bits control the configuration of the CANRX0 and CANRX1 pins. Refer to the
Table D-60.
This bit field controls the configuration of the CANTX0 and CANTX1 pins. Refer to the
Table D-61.
1. CANRX1 is not present on the MC68376.
0 = Bus off interrupt disabled.
1 = Bus off interrupt enabled.
0 = Error interrupt disabled.
1 = Error interrupt enabled.
1
NOTES:
TXMODE[1:0]
RX1
1. Full CMOS drive indicates that both dominant and recessive levels are driven by the chip.
2. CANTX1 is not present on the MC68376.
3. If negative polarity is activated when the LOOP bit in CANCTRL1 is set, the RX mode bit
4. Open drain drive indicates that only a dominant level is driven by the chip. During a reces-
X
X
0
1
field should also be set to assure proper operation.
sive level, the CANTX0 and CANTX1 pins are disabled (three stated), and the electrical lev-
el is achieved by external pull-up/pull-down devices. The assertion of both TX mode bits
causes the polarity inversion to be cancelled (open drain mode forces the polarity to be
positive).
1X
00
01
RX0
X
X
0
1
Full CMOS
Full CMOS; negative polarity
Open drain
Table D-60 RX MODE[1:0] Configuration
A logic 0 on the CANRX1 pin is interpreted as a dominant bit; a logic 1 on the CANRX1
pin is interpreted as a recessive bit
A logic 1 on the CANRX1 pin is interpreted as a dominant bit; a logic 0 on the CANRX1
pin is interpreted as a recessive bit
A logic 0 on the CANRX0 pin is interpreted as a dominant bit; a logic 1 on the CANRX0
pin is interpreted as a recessive bit
A logic 1 on the CANRX0 pin is interpreted as a dominant bit; a logic 0 on the CANRX0
pin is interpreted as a recessive bit
Table D-61 Transmit Pin Configuration
1
4
; positive polarity (CANTX0 = 0, CANTX1 = 1
; positive polarity
REGISTER SUMMARY
Transmit Pin Configuration
3
Receive Pin Configuration
(CANTX0 = 1, CANTX1 = 0 is a dominant level)
2
is a dominant level)
MOTOROLA
D-89