MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 80

MC68376BAMFT20

Manufacturer Part Number
MC68376BAMFT20
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68376BAMFT20

Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Interface Type
QSPI/SCI
Program Memory Type
ROM
Program Memory Size
8KB
Total Internal Ram Size
7.5KB
# I/os (max)
18
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
On-chip Adc
16-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
160
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BAMFT20
Manufacturer:
FREESCAL
Quantity:
245
5.2 System Configuration
5.2.1 Module Mapping
5.2.2 Interrupt Arbitration
5-2
MOTOROLA
The SIM configuration register (SIMCR) governs several aspects of system operation.
The following paragraphs describe those configuration options controlled by SIMCR.
Control registers for all the modules in the microcontroller are mapped into a 4-Kbyte
block. The state of the module mapping bit (MM) in the SIM configuration register
(SIMCR) determines where the control register block is located in the system memory
map. When MM = 0, register addresses range from $7FF000 to $7FFFFF; when MM
= 1, register addresses range from $FFF000 to $FFFFFF.
Each module that can request interrupts has an interrupt arbitration (IARB) field. Arbi-
tration between interrupt requests of the same priority is performed by serial conten-
tion between IARB field bit values. Contention must take place whenever an interrupt
request is acknowledged, even when there is only a single request pending. For an
interrupt to be serviced, the appropriate IARB field must have a non-zero value. If an
interrupt request from a module with an IARB field value of %0000 is recognized, the
CPU32 processes a spurious interrupt exception.
Figure 5-1 System Integration Module Block Diagram
SYSTEM INTEGRATION MODULE
EXTERNAL BUS INTERFACE
SYSTEM CONFIGURATION
CLOCK SYNTHESIZER
SYSTEM PROTECTION
FACTORY TEST
CHIP-SELECTS
MODCLK
TSTME/TSC
XTAL
CLKOUT
EXTAL
CHIP-SELECTS
EXTERNAL BUS
FREEZE/QUOT
RESET
USER’S MANUAL
MC68336/376
300 S(C)IM BLOCK

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