MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 23

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Table
A-15
A-16
A-17
A-18
A-19
B-1
B-2
D-1
D-2
D-3
D-4
D-5
D-6
D-7
D-8
D-9
D-10
D-11
D-12
D-13
D-14
D-15
D-16
D-17
D-18
D-19
D-20
D-21
D-22
D-23
D-24
D-25
D-26
D-27
D-28
D-29
D-30
D-31
D-32
D-33
D-34
MC68336/376
USER’S MANUAL
FCSM Timing Characteristics....................................................................... A-31
MCSM Timing Characteristics...................................................................... A-31
SASM Timing Characteristics....................................................................... A-32
DASM Timing Characteristics ...................................................................... A-33
PWMSM Timing Characteristics................................................................... A-34
MC68336 Ordering Information...................................................................... B-4
MC68376 Ordering Information...................................................................... B-5
Module Address Map .....................................................................................D-1
T[1:0] Encoding ..............................................................................................D-3
SIM Address Map...........................................................................................D-5
Show Cycle Enable Bits .................................................................................D-7
Port E Pin Assignments................................................................................D-11
Port F Pin Assignments................................................................................D-12
Software Watchdog Timing Field .................................................................D-13
Bus Monitor Time-Out Period.......................................................................D-13
Pin Assignment Field Encoding....................................................................D-15
CSPAR0 Pin Assignments ...........................................................................D-16
CSPAR1 Pin Assignments ...........................................................................D-16
Reset Pin Function of CS[10:6] ....................................................................D-17
Block Size Field Bit Encoding.......................................................................D-18
BYTE Field Bit Encoding ..............................................................................D-19
Read/Write Field Bit Encoding .....................................................................D-19
DSACK Field Encoding ................................................................................D-20
Address Space Bit Encodings ......................................................................D-20
Interrupt Priority Level Field Encoding .........................................................D-20
SRAM Address Map.....................................................................................D-22
RASP Encoding............................................................................................D-22
MRM Address Map.......................................................................................D-24
ROM Array Space Field ...............................................................................D-25
Wait States Field ..........................................................................................D-25
QADC Address Map.....................................................................................D-28
Queue 1 Operating Modes ...........................................................................D-32
Queue 2 Operating Modes ...........................................................................D-34
Queue Status ...............................................................................................D-36
Input Sample Times .....................................................................................D-37
Non-multiplexed Channel Assignments and Pin Designations ....................D-38
Multiplexed Channel Assignments and Pin Designations ............................D-38
QSM Address Map .......................................................................................D-40
PQSPAR Pin Assignments...........................................................................D-47
Effect of DDRQS on QSM Pin Function .......................................................D-48
Bits Per Transfer ..........................................................................................D-49
LIST OF TABLES
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Title
MOTOROLA
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