DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 13

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

Table 1–3. Stratix V GS Device Features
Logic Elements (K)
Registers (K)
14.1-Gbps transceivers
PCIe hard IP blocks
Fractional PLL
M20K Memory Blocks
M20K Memory (MBits)
Variable Precision Multipliers (18×18)
Variable Precision Multipliers (27×27)
DDR3 SDRAM ×72 DIMM Interfaces
User I/Os, Full-Duplex LVDS, 14.1-Gbps Transceivers
DF23-F484
EF29-F780
GF35/HF35-F1152
KF40-F1517
NF45-F1932
Notes to
(1) Packages are flipchip ball grid array (1.0-mm pitch).
(2) LVDS counts are full duplex channels. Each full duplex channel is one TX pair plus one RX pair.
(3) Each package row offers pin migration (common circuit board footprint) for all devices in the row.
(4) Migration between select Stratix V GS devices and Stratix V GX devices is available. For more information, refer to
Table
Package (1), (2),
(4)
(4)
1–3:
Features
(4)
Table 1–3
(3)
lists the Stratix V GS device features.
400, 100, 12
240, 60, 9
5SGSD2
5SGSD2
130
196
450
650
325
12
10
—
—
—
1
2
9
400, 100, 12
500, 125, 18
240, 60, 9
5SGSD3
5SGSD3
1,260
236
356
688
630
18
12
—
—
14
1
2
400, 100, 12
560, 140, 24
700, 175, 36
5SGSD4
5SGSD4
1,062
1,892
332
500
946
24
—
16
22
—
1
4
Table 1–5 on page
560, 140, 24
700, 175, 36
5SGSD5
5SGSD5
1,950
2,996
1,498
1–9.
462
696
36
24
—
—
—
40
1
4
700, 175, 36
900, 225, 48
5SGSD6
5SGSD6
1 or 2
2,320
3,550
1,775
880
583
48
28
—
—
—
48
7
700, 175, 36
900, 225, 48
5SGSD8
5SGSD8
1 or 2
1,060
2,688
4,096
2,048
703
48
—
—
—
28
55
7