DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 145

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DK-DEV-5SGXEA7/ES

Manufacturer Part Number
DK-DEV-5SGXEA7/ES
Description
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer
Altera
Series
Stratix® Vr
Type
FPGAr
Datasheets

Specifications of DK-DEV-5SGXEA7/ES

Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Stratix® V 5SGXEA7
Other names
544-2725
Chapter 4: Clock Networks and PLLs in Stratix V Devices
Clock Networks in Stratix V Devices
Figure 4–5. PCLK Networks—5SGXA5 and 5SGXA7 Devices
Figure 4–6. PCLK Networks—5SGSD6 and 5SGSD8 Devices
May 2011 Altera Corporation
Horizontal
PCLK[0..16]
Horizontal
PCLK[17..32]
Horizontal
PCLK[33..48]
Horizontal
PCLK[49..65]
Horizontal
PCLK[0..17]
Horizontal
PCLK[18..35]
Horizontal
PCLK[36..53]
Horizontal
PCLK[54..71]
Vertical
PCLK[26..51]
Vertical
PCLK[24..47]
Vertical
PCLK[0..25]
Vertical
PCLK[0..23]
Q1
Q4
Q1
Q4
Q2
Q3
Q2
Q3
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
Vertical
PCLK[102..120]
Vertical
PCLK[113..138]
Vertical
PCLK[83..101]
Vertical
PCLK[87..112]
Horizontal
PCLK[135..152]
Horizontal
PCLK[113..134]
Horizontal
PCLK[90..112]
Horizontal
PCLK[72..89]
Horizontal
PCLK[115..131]
Horizontal
PCLK[99..114]
Horizontal
PCLK[83..98]
Horizontal
PCLK[66..82]
4–5

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