HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 126

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

5.2.2
The IPR registers are eleven 8-bit readable/writable registers that set priorities (levels 7 to 0) for
interrupts other than NMI.
The correspondence between IPR settings and interrupt sources is shown in table 5.3.
The IPR registers set a priority (level 7 to 0) for each interrupt source other than NMI.
The IPR registers are initialized to H'77 by a reset and in hardware standby mode.
Bits 7 and 3—Reserved: Read-only bits, always read as 0.
Table 5.3
Register
IPRA
IPRB
IPRC
IPRD
IPRE
IPRF
IPRG
IPRH
IPRI
IPRJ
IPRK
Note: * Reserved bits. May be read or written, but the setting is ignored.
Bit
Initial value
R/W
Interrupt Priority Registers A to K (IPRA to IPRK)
:
:
:
Correspondence between Interrupt Sources and IPR Settings
—
—
7
0
IPR6
R/W
6 to 4
IRQ0
IRQ2
IRQ3
IRQ6
IRQ7
Watchdog timer
—*
TPU channel 0
TPU channel 2
TPU channel 4
8-bit timer channel 0
—*
SCI channel 1
6
1
IPR5
R/W
5
1
IPR4
R/W
4
1
—
—
3
0
Bits
2 to 0
IRQ1
IRQ4
IRQ5
DTC
—*
A/D converter
TPU channel 1
TPU channel 3
TPU channel 5
8-bit timer channel 1
SCI channel 0
—*
IPR2
R/W
2
1
IPR1
R/W
1
1
IPR0
R/W
0
1
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