HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 857

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

TCR1—Timer Control Register 1
848
Bit
Initial value
Read/Write
:
:
:
—
—
7
0
Note: * Synchronous operating setting is performed by setting
Counter Clear
0
1
CCLR1
R/W
0
1
0
1
6
0
the SYNC bit in TSYR to 1.
TCNT clearing disabled
TCNT cleared by TGRA compare match/input capture
TCNT cleared by TGRB compare match/input capture
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation*
CCLR0
R/W
5
0
CKEG1
Note: This setting is ignored when channel 1
Clock Edge
R/W
0
1
4
0
is in phase counting mode.
0
1
*
CKEG0
R/W
Count at rising edge
Count at falling edge
Count at both edges
3
0
Note: This setting is ignored when channel 1 is in phase
Time Prescaler
H'FFE0
0
1
counting mode.
0
1
0
1
TPSC2
R/W
2
0
0
1
0
1
0
1
0
1
Internal clock: counts on ø/1
Internal clock: counts on ø/4
Internal clock: counts on ø/16
Internal clock: counts on ø/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
Internal clock: counts on ø/256
Counts on TCNT2 overflow/underflow
*: Don’t care
TPSC1
R/W
1
0
TPSC0
R/W
0
0
TPU1