HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 521

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

14.2.2
ADCSR is an 8-bit readable/writable register that controls A/D conversion operations and shows
the status of the operation.
ADCSR is initialized to H'00 by a reset, and in hardware standby mode or module stop mode.
Bit 7—A/D End Flag (ADF): Status flag that indicates the end of A/D conversion.
Bit 7
ADF
0
1
Bit 6—A/D Interrupt Enable (ADIE): Selects enabling or disabling of interrupt (ADI) requests
at the end of A/D conversion.
Bit 6
ADIE
0
1
508
Bit
Initial value
R/W
Note: * Only 0 can be written to bit 7, to clear this flag.
A/D Control/Status Register (ADCSR)
Description
[Clearing conditions]
[Setting conditions]
Description
A/D conversion end interrupt (ADI) request disabled
A/D conversion end interrupt (ADI) request enabled
:
:
:
When 0 is written to the ADF flag after reading ADF = 1
When the DTC is activated by an ADI interrupt and ADDR is read
Single mode: When A/D conversion ends
Scan mode: When A/D conversion ends on all specified channels
R/(W)*
ADF
7
0
ADIE
R/W
6
0
ADST
R/W
5
0
SCAN
R/W
4
0
CKS
R/W
3
0
CH2
R/W
2
0
CH1
R/W
1
0
(Initial value)
(Initial value)
CH0
R/W
0
0