HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 262

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Port B Data Register (PBDR)
PBDR is an 8-bit readable/writable register that stores output data for the port B pins (PB
PBDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior
state after a manual reset, and in software standby mode.
Port B Register (PORTB)
PORTB is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port B pins (PB
If a port B read is performed while PBDDR bits are set to 1, the PBDR values are read. If a port B
read is performed while PBDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTB contents are determined by the pin
states, as PBDDR and PBDR are initialized. PORTB retains its prior state after a manual reset, and
in software standby mode.
Bit
Initial value
R/W
Bit
Initial value
R/W
Note: * Determined by state of pins PB
:
:
:
:
:
:
PB7DR
R/W
PB7
—*
7
0
R
7
PB6DR
R/W
PB6
—*
6
0
R
6
7
to PB
PB5DR
R/W
PB5
7
—*
5
0
R
5
0
to PB
) must always be performed on PBDR.
0
PB4DR
.
R/W
PB4
—*
4
0
R
4
PB3DR
R/W
PB3
—*
3
0
R
3
PB2DR
R/W
PB2
—*
2
0
R
2
PB1DR
R/W
PB1
—*
1
0
R
1
PB0DR
7
R/W
PB0
to PB
—*
0
0
R
0
245
0
).

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