HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 312

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Channel
0
Notes: 1. When bits TPSC2 to TPSC0 in TCR1 are set to B'000 and ø/1 is used as the TCNT1
TIOR0L
2. When the BFB bit in TMDR0 is set to 1 and TGR0D is used as a buffer register, this
Bit 7 Bit 6 Bit 5 Bit 4
IOD3 IOD2 IOD1 IOD0 Description
0
1
count clock, this setting is invalid and input capture is not generated.
setting is invalid and input capture/output compare is not generated.
0
1
0
1
0
1
0
1
0
1
*
0
1
0
1
0
1
0
1
0
1
*
*
TGR0D is Output disabled
output
compare
register*
TGR0D is Capture input
input
capture
register*
2
2
Initial output is 0
output
Output disabled
Initial output is 1
output
source is
TIOCD0 pin
Capture input
source is channel
1/count clock
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1
count-up/count-down*
(Initial value)
*: Don’t care
1
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