HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 42

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

2.1.2
The differences between the H8S/2600 CPU and the H8S/2000 CPU are as shown below.
Instruction
MULXU
MULXS
There are also differences in the address space, CCR and EXR register functions, power-down
state, etc., depending on the product.
22
High-speed operation
Two CPU operating modes
Power-down state
Register configuration
The MAC register is supported only by the H8S/2600 CPU.
Basic instructions
The four instructions MAC, CLRMAC, LDMAC, and STMAC are supported only by the
H8S/2600 CPU.
Number of execution states
The number of execution states of the MULXU and MULXS instructions.
All frequently-used instructions execute in one or two states
Maximum clock rate
8/16/32-bit register-register add/subtract : 50 ns
8
16 8-bit register-register divide
16
32 16-bit register-register divide
Normal mode (Supported on ZTAT, mask ROM, and ROMless versions only)
Advanced mode
Transition to power-down state by SLEEP instruction
CPU clock speed selection
Differences between H8S/2600 CPU and H8S/2000 CPU
8-bit register-register multiply
16-bit register-register multiply
Mnemonic
MULXU.B Rs, Rd
MULXU.W Rs, ERd
MULXS.B Rs, Rd
MULXS.W Rs, ERd
: 20 MHz
: 600 ns
: 600 ns
: 1000 ns
: 1000 ns
H8S/2600
3
4
4
5
Internal Operation
H8S/2000
12
20
13
21