HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 36

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Part Number
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Quantity
Price
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Table 1.3
Type
Operating mode
control
System control
16
Pin Functions (cont)
Symbol
MD
MD
RES
STBY
BREQ
BACK
FWE *
2
0
to
1
FP-100B,
TFP-100B,
TFP-100G FP-100A
61, 58,
57
62
64
76
75
60
Pin No.
63, 60,
59
64
66
78
77
62
I/O
Input
Input
Input
Input
Output Bus request acknowledge: Indicates
Input
Name and Function
MD
0
1
Note: * Not used on ROMless
Reset input: When this pin is driven
low, the chip is reset. The type of
reset can be selected according to
the NMI input level. At power-on, the
NMI pin input level should be set
high.
Standby: When this pin is driven low,
a transition is made to hardware
standby mode.
Bus request: Used by an external
bus master to issue a bus request to
the H8S/2345 Series.
that the bus has been released to an
external bus master.
Flash write enable: Enables or
disables writing to flash memory.
ZTAT, mask ROM, and ROMless
versions
2
MD
0
1
0
1
version.
1
MD
0
1
0
1
0
1
0
1
0
Operating
Mode
Mode 1
Mode 2*
Mode 3*
Mode 4
Mode 5
Mode 6*
Mode 7*

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