HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 603

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Table 17.20 Settings for Each Operating Mode in Writer Mode
Mode
Read
Output disable
Command write
Chip disable*
Legend:
H:
L:
X:
Hi-z: High impedance
Notes: 1. Chip disable is not a standby state; internally, it is an operation state.
Table 17.21 Writer Mode Commands
Command Name
Memory read mode
Auto-program mode
Auto-erase mode
Status read mode
Legend:
RA:
WA: Program address (Write address)
Dout: Read data
Din: Program data
Notes: 1. In memory read mode, the number of cycles depends on the number of address write
High level
Low level
Don’t care
Read address
2. Ain indicates that there is also address input in auto-program mode.
3. For command writes when making a transition to auto-program or auto-erase mode,
2. In auto-program mode. 129 cycles are required for command writing by a simultaneous
input a high level to the FWE pin.
cycles (n).
128-byte write.
1
FWE
H or L
H or L
H or L*
H or L
Number
of Cycles
1 + n *
129 *
2
2
3
2
1
CE
L
L
L
H
Mode
Write
Write
Write
Write
OE
L
H
H
X
1st Cycle
Address Data
X
X
X
X
Pin Names
WE
H
H
L
X
H'00
H'40
H'20
H'71
Mode
Read
Write
Write
Write
FO
Data output
Hi-z
Data input
Hi-z
0
to FO
2nd Cycle
Address Data
RA
WA
X
X
7
FA
Ain
X
Ain*
X
0
to FA
2
Dout
Din
H'20
H'71
16
591