HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 770

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

MRB—DTC Mode Register B
SAR—DTC Source Address Register
DAR—DTC Destination Address Register
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
:
:
:
:
:
:
:
:
:
Unde-
Unde-
fined
fined
23
23
—
—
Undefined
CHNE
DTC Chain Transfer Enable
Unde-
Unde-
—
fined
fined
7
0
1
22
22
—
—
End of DTC data transfer
DTC chain transfer
Unde-
Unde-
fined
fined
21
21
—
—
Undefined
DISEL
DTC Interrupt Select
Unde-
Unde-
—
fined
fined
6
20
—
20
—
0
1
Unde-
Specifies transfer data destination address
Unde-
After a data transfer ends, the CPU interrupt is
disabled unless the transfer counter is 0
After a data transfer ends, the CPU interrupt is enabled
fined
fined
19
19
—
—
Undefined
Specifies transfer data source address
—
—
5
Undefined
—
—
4
- - -
- - -
- - -
- - -
- - -
- - -
- - -
- - -
H'F800—H'FBFF
H'F800—H'FBFF
H'F800—H'FBFF
Undefined
Reserved
Only 0 should be written to these bits
—
—
3
Undefined
—
—
2
Unde-
Unde-
fined
fined
—
—
4
4
Unde-
Unde-
Undefined
fined
fined
—
—
3
3
—
—
1
Unde-
Unde-
fined
fined
—
—
2
2
Undefined
Unde-
Unde-
fined
fined
—
—
1
1
—
—
0
Unde-
Unde-
fined
fined
—
—
DTC
DTC
DTC
0
0
761