HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 582

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

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Note: If a memory cell does not operate normally and cannot be erased, one H'FF byte is
After bit rate adjustment, H8S/2345
continuously at prescribed bit rate
host to indicate end of adjustment
H8S/2345 calculates bit rate and
of H'00 data transmitted by host
H8S/2345 measures low period
transmits one H'00 data byte to
Host confirms normal reception
indication (H'00), and transmits
H8S/2345 transmits one H'AA
sets value in bit rate register
of bit rate adjustment end
Host transfers data (H'00)
and execute reset-start
Set pins to boot mode
transmitted as an erase error, and the erase operation and subsequent operations
are halted.
After receiving H'55,
one H'55 data byte
data byte to host
Start
Figure 17.16 Boot Mode Execution Procedure
Host transmits programming control
program transferred to on-chip RAM
H8S/2345 transmits one H'AA data
program sequentially in byte units
of programming control program
number of bytes to host as verify
programming control program to
control program to on-chip RAM
if data has already been written,
Transfer received programming
memory data has been erased,
host as verify data (echo-back)
Check flash memory data, and
bytes (N), upper byte followed
H8S/2345 transmits received
H8S/2345 transmits received
Execute programming control
After confirming that all flash
Host transmits number
End of transmission
data (echo-back)
erase all blocks
by lower byte
byte to host
n = N?
n = 1
Yes
No
n + 1
n