HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 628

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Table 19.1 Operating Modes
Operating
Mode
High speed
mode
Medium-
speed mode
Sleep mode Instruction
Module stop
mode
Software
standby
mode
Hardware
standby
mode
Notes: 1. The bus master operates on the medium-speed clock, and other on-chip supporting
19.1.1
Power-down modes are controlled by the SBYCR, SCKCR, and MSTPCR registers. Table 19.2
summarizes these registers.
Table 19.2 Power-Down Mode Registers
Name
Standby control register
System clock control register
Module stop control register H
Module stop control register L
Note: * Lower 16 bits of the address.
618
2. The SCI and A/D converter are reset, and other on-chip supporting modules retain their
Register Configuration
modules on the high-speed clock.
state.
Transition
Condition
Control
register
Control
register
Control
register
Instruction
Pin
Clearing
Condition
Interrupt
External
interrupt
Abbreviation
SBYCR
SCKCR
MSTPCRH
MSTPCRL
Oscillator
Functions
Functions
Functions
Functions
Halted
Halted
High
speed
Medium
speed
Halted
High/
medium
speed
Halted
Halted
R/W
R/W
R/W
R/W
R/W
CPU
Registers
Functions
Functions
Retained
Functions
Retained
Undefined
Initial Value
H'08
H'00
H'3F
H'FF
High
speed
High/
medium
speed *
High
speed
Halted
Halted
Halted
Modules
1
Registers
Functions
Functions
Functions
Retained/
reset *
Retained/
reset *
Reset
2
2
H'FF38
H'FF3A
Address*
H'FF3C
H'FF3D
I/O Ports
High speed
High speed
High speed
Retained
Retained
High
impedance

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