HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 852

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

TIOR0H—Timer I/O Control Register 0H
Bit
Initial value
Read/Write
Note: *1. When bits TPSC2 to TPSC0 in TCR1 are set to B'000, and ø/1 is used as the TCNT1 count clock, this setting is invalid and
TGR0B I/O Control
0
1
0
1
0
1
:
:
:
input capture is not generated.
0
1
0
1
0
1
*
IOB3
R/W
7
0
0
1
0
1
0
1
0
1
0
1
*
*
TGR0B
is output
compare
register
TGR0B
is input
compare
register
IOB2
R/W
6
0
Output disabled
Initial output is
0 output
Output disabled
Initial output is
0 output
Capture input
source is
TIOCB0 pin
Capture input
source is channel
1/count clock
IOB1
R/W
5
0
IOB0
R/W
4
0
TGR0A I/O Control
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down*
0
1
0
1
0
1
IOA3
R/W
3
0
0
1
0
1
0
1
*
1
0
1
0
1
0
1
0
1
0
1
*
*
IOA2
R/W
TGR0A
is output
compare
register
TGR0A
is input
capture
register
2
0
H'FFD2
* : Don’t care
IOA1
R/W
Output disabled
Initial output is
0 output
Output disabled
Initial output is
1 output
Capture input
source is
TIOCA0 pin
Capture input
source is channel
1/count clock
1
0
IOA0
R/W
0
0
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down
* : Don’t care
TPU0
843