HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 900

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Table D.1
Port Name
Pin Name
PF
PF
PF
PF
PF
IRQ3
PF
IRQ2
PF
IRQ1
PF
IRQ0
PG
890
7
6
5
4
3
2
1
0
4
/ø
/AS
/RD
/HWR
/LWR/
/WAIT/
/BACK/
/BREQ/
/CS0
I/O Port States in Each Processing State (cont)
MCU
Operating
Mode
1, 2, 4 to 6
3, 7
1, 2, 4 to 6
3, 7
1, 2, 4 to 6
3, 7
1, 2, 4 to 6
3, 7
1, 2, 4 to 6
3, 7
1, 4, 5
2, 6
3, 7
Power-
On
Reset
Clock
output
T
H
T
T
T
T
T
T
T
H
T
T
Manual
Reset
[DDR = 0]
T
[DDR = 1]
Clock
output
kept
H*
kept
[WAITE = 0]
kept
[WAITE = 1]
T
kept
[BRLE = 0]
kept
[BRLE = 1]
BACK
kept
[BRLE = 0]
kept
[BRLE = 1]
BREQ
kept
[DDR = 0]
T
[DDR = 1]
H*
kept
Hardware
Standby
Mode
T
T
T
T
T
T
T
T
T
T
T
T
Software
Standby
Mode
[DDR = 0]
Input port
[DDR = 1]
H
[DDR = 0]
Input port
[DDR = 1]
H
[OPE = 0]
T
[OPE = 1]
H
kept
[WAITE = 0]
kept
[WAITE = 1]
T
kept
[BRLE = 0]
kept
[BRLE = 1]
H
kept
[BRLE = 0]
kept
[BRLE = 1]
T
kept
[DDR · OPE = 0] T
T
[DDR · OPE = 1]
H
kept
Bus
Release
State
[DDR = 0]
Input port
[DDR = 1]
Clock
output
[DDR = 0]
Input port
[DDR = 1]
Clock
output
T
kept
[WAITE = 0]
kept
[WAITE = 1]
T
kept
L
kept
T
kept
kept
Program
Execution
State
Sleep Mode
[DDR = 0]
Input port
[DDR = 1]
Clock
output
[DDR = 0]
Input port
[DDR = 1]
Clock
output
AS, RD,
HWR, LWR
I/O port
[WAITE = 0]
I/O port
[WAITE = 1]
WAIT
I/O port
[BRLE = 0]
I/O port
[BRLE = 1]
BACK
I/O port
[BRLE = 0]
I/O port
[BRLE = 1]
BREQ
I/O port
[DDR = 0]
Input port
[DDR = 1]
CS
I/O port
0