HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 275

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Port D MOS Pull-Up Control Register (PDPCR)
PDPCR is an 8-bit readable/writable register that controls the MOS input pull-up function
incorporated into port D on an individual bit basis.
When a PDDDR bit is cleared to 0 (input port setting) in mode 3 or 7, setting the corresponding
PDPCR bit to 1 turns on the MOS input pull-up for the corresponding pin.
PDPCR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its
prior state after a manual reset, and in software standby mode.
8.9.3
Modes 1, 2, 4, 5, and 6*: In modes 1, 2, 4, 5, and 6*, port D pins are automatically designated as
data I/O pins.
Port D pin functions in modes 1, 2, 4, 5, and 6 are shown in figure 8.18.
Modes 3 and 7*: In modes 3 and 7*, port D pins function as I/O ports. Input or output can be
specified for each pin on an individual bit basis. Setting a PDDDR bit to 1 makes the
corresponding port D pin an output port, while clearing the bit to 0 makes the pin an input port.
Note: * Modes 1 to 3 are not available on the F-ZTAT version.
258
Bit
Initial value
R/W
Modes 2, 3, 6, and 7 are not available on the ROMless version.
Pin Functions
:
:
:
Figure 8.18 Port D Pin Functions (Modes 1, 2, 4, 5, and 6)*
PD7PCR
R/W
7
0
PD6PCR
R/W
6
0
PD5PCR
Port D
R/W
5
0
PD4PCR
R/W
4
0
D
D
D
D
D
D
D
D
15
14
13
12
11
10
9
8
PD3PCR
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
(I/O)
R/W
3
0
PD2PCR
R/W
2
0
PD1PCR
R/W
1
0
PD0PCR
R/W
0
0

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