HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 233

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Table 8.3
Pin
P1
TCLKA/A
216
2
/TIOCC0/
22
Port 1 Pin Functions (cont)
Selection Method and Pin Functions
The pin function is switched as shown below according to the combination of
the operating mode, TPU channel 0 setting (by bits MD3 to MD0 in TMDR0,
bits IOC3 to IOC0 in TIOR0L, and bits CCLR2 to CCLR0 in TCR0), bits TPSC2
to TPSC0 in TCR0 to TCR2, and bit P12DDR.
Notes: 1. Modes 1 to 3 are not available on the F-ZTAT version.
Operating
Mode
TPU Channel
0 Setting
P12DDR
Pin function
TPU Channel
0 Setting
MD3 to MD0
IOC3 to IOC0
CCLR2 to
CCLR0
Output
function
2. TIOCC0 input when TPU channel 0 is in normal operation mode
3. TCLKA input when the TCR0 to TCR5 setting is: TPSC2 to TPSC0
4. TIOCD0 output is disabled.
Modes 2, 3, 6, and 7 are not available on the ROMless version.
(MD3 to MD0 = B'0000) and input capture is set (IOC3 to IOC0 =
B'10xx).
= B'100.
TCLKA input when channel 1 and 5 are set to phase counting
mode (MD3 to MD0 = B'01xx).
When BFA = 1 or BFB = 1 in TMDR0, output is disabled and
setting (2) applies.
B'0000
B'0100
B'1xxx
Below (1)
TIOCC0
(2)
output
—
—
Table
Modes 1, 2, 3, 7*
—
B'0000
B'0001 to
B'0011
B'0101 to
B'0111
compare
Output
output
(1)
—
input
P1
Below (2)
0
TIOCC0
input*
2
Table
B'001x
B'xx00
output
1
TCLKA input*
P1
(2)
—
—
2
1
2
TIOCC0
output
output*
mode 1
B'0010
Below (1)
0
PWM
(1)
Table
—
3
Other than B'xx00
Modes 4, 5, 6*
output
4
A
1
22
mode 2
output
Other
B'101
PWM
than
(1)
input
B'0011
P1
x: Don’t care
Below (2)
0
TIOCC0
input*
Table
2
1
B'101
output
(2)
—
A
2
1
22