HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 185

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

(3) Relationship between Chip Select (CS) Signal and Read (RD) Signal
Depending on the system’s load conditions, the RD signal may lag behind the CS signal. An
example is shown in figure 6.18.
In this case, with the setting for no idle cycle insertion (a), there may be a period of overlap
between the bus cycle A RD signal and the bus cycle B CS signal.
Setting idle cycle insertion, as in (b), however, will prevent any overlap between the RD and CS
signals.
In the initial state after reset release, idle cycle insertion (b) is set.
166
Address bus
CS (area A)
CS (area B)
RD
Possibility of overlap between
CS (area B) and RD
ø
Figure 6.18 Relationship between Chip Select (CS) and Read (RD)
(a) Idle cycle not inserted
T
1
Bus cycle A
(ICIS1 = 0)
T
2
T
3
Bus cycle B
T
1
T
2
Address bus
CS (area A)
CS (area B)
RD
ø
T
1
Bus cycle A
(b) Idle cycle inserted
T
(Initial value ICIS1 = 1)
2
T
3
T
I
Bus cycle B
T
1
T
2