HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 513

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Thus the reception margin in smart card interface mode is given by the following formula.
Where M: Reception margin (%)
Assuming values of F = 0 and D = 0.5 in the above formula, the reception margin formula is as
follows.
When D = 0.5 and F = 0,
Internal
basic
clock
Receive
data (RxD)
Synchro-
nization
sampling
timing
Data
sampling
timing
N: Ratio of bit rate to clock (N = 372)
D: Clock duty (D = 0 to 1.0)
L: Frame length (L = 10)
F: Absolute value of clock frequency deviation
M = (0.5 – 1/2
M = (0.5 –
= 49.866%
Figure 13.10 Receive Data Sampling Timing in Smart Card Mode
0
186 clocks
2N
1
185
372 clocks
Start bit
372)
) – (L – 0.5) F –
100%
371
0
D – 0.5
N
D0
(1 + F)
100%
185
371 0
D1
499