HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 616

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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The following points must be observed concerning FWE pin application and disconnection to
prevent unintentional programming or erasing of flash memory:
Do not apply a constant high level to the FWE pin: The only time a high level should be
applied to the FWE pin in order to prevent erroneous programming or erasing due to program
runaway is when programming or erasing flash memory (including when RAM is being used to
emulate flash memory). A system configuration in which a high level is constantly applied to the
FWE should be avoided. Also, while a high level is applied to the FWE pin, the watchdog timer
should be activated to prevent overprogramming or overerasing due to program runaway, etc.
Use the recommended algorithm when programming and erasing flash memory: The
recommended algorithm enables programming and erasing to be carried out without subjecting the
device to voltage stress or sacrificing program data reliability. When setting the P or E bit in
FLMCR1, the watchdog timer should be set beforehand as a precaution against program runaway,
etc.
Do not set or clear the SWE bit during program execution in flash memory: Clear the SWE
bit before executing a program or reading data in flash memory. When the SWE bit is set, data in
flash memory can be rewritten, but flash memory should only be accessed for verify operations
(verification during programming/erasing). Similarly, when using the RAM emulation function
while a high level is being input to the FWE pin, the SWE bit must be cleared before executing a
program or reading data in flash memory. However, the RAM area overlapping flash memory
space can be read and written to regardless of whether the SWE bit is set or cleared.
Do not use interrupts while flash memory is being programmed or erased: All interrupt
requests, including NMI, should be disabled during FWE application to give priority to
program/erase operations (including when RAM is being used to emulate flash memory).
Also, it is necessary to prohibit release of the bus.
604
Apply the FWE pin when the V
the FWE pin when oscillation has stabilized (after the oscillation settling time t
elapsed).
In boot mode, apply and disconnect the FWE pin during a reset.
In user program mode, the FWE pin can be switched between high and low level regardless of
the reset state. FWE pin input can also be switched during program execution in flash memory.
Do not apply the FWE pin if program runaway has occurred.
Disconnect the FWE pin only when the SWE, ESU, PSU, EV, PV, P, and E bits in FLMCR1
and FLMCR2 are cleared.
Make sure that the SWE, ESU, PSU, EV, PV, P, and E bits are not set by mistake when
applying or disconnecting the FWE pin.
CC
voltage has stabilized within its rated voltage range. Apply
OSC1
has

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