HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 432

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

12.2.5
SMR is an 8-bit register used to set the SCI’s serial transfer format and select the baud rate
generator clock source.
SMR can be read or written to by the CPU at all times.
SMR is initialized to H'00 by a reset, and in standby mode or module stop mode.
Bit 7—Communication Mode (C/A): Selects asynchronous mode or clocked synchronous mode
as the SCI operating mode.
Bit 7
C/A
0
1
Bit 6—Character Length (CHR): Selects 7 or 8 bits as the data length in asynchronous mode. In
clocked synchronous mode, a fixed data length of 8 bits is used regardless of the CHR setting.
Bit 6
CHR
0
1
Note: * When 7-bit data is selected, the MSB (bit 7) of TDR is not transmitted, and it is not possible
418
Bit
Initial value
R/W
to choose between LSB-first or MSB-first transfer.
Serial Mode Register (SMR)
Description
Asynchronous mode
Clocked synchronous mode
Description
8-bit data
7-bit data*
:
:
:
R/W
C/A
7
0
CHR
R/W
6
0
R/W
PE
5
0
R/W
O/E
4
0
STOP
R/W
3
0
R/W
MP
2
0
CKS1
R/W
1
0
(Initial value)
(Initial value)
CKS0
R/W
0
0