HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 237

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HD6412340

Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Port 2 Data Direction Register (P2DDR)
P2DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 2. P2DDR cannot be read; if it is, an undefined value will be read.
Setting a P2DDR bit to 1 makes the corresponding port 2 pin an output pin, while clearing the bit
to 0 makes the pin an input pin.
P2DDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its
prior state after a manual reset, and in software standby mode. As the TPU and 8-bit timer are
initialized by a manual reset, the pin states are determined by the P2DDR and P2DR
specifications.
Port 2 Data Register (P2DR)
P2DR is an 8-bit readable/writable register that stores output data for the port 2 pins (P2
P2DR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior
state after a manual reset, and in software standby mode.
220
Bit
Initial value
R/W
Bit
Initial value
R/W
:
:
:
:
:
:
P27DDR
P27DR
W
R/W
7
0
7
0
P26DDR
P26DR
W
R/W
6
0
6
0
P25DDR
P25DR
W
R/W
5
0
5
0
P24DDR
P24DR
W
R/W
4
0
4
0
P23DDR
P23DR
W
R/W
3
0
3
0
P22DDR
P22DR
W
R/W
2
0
2
0
P21DDR
P21DR
W
1
0
R/W
1
0
P20DDR
7
to P2
P20DR
W
R/W
0
0
0
0
0
).

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