MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 149

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

6.6 Data Format Summary
MMC2107 – Rev. 2.0
MOTOROLA
31
31
31
31
31
31
BYTE 0
BYTE 4
BYTE 8
BYTE C
S S S S S S S S S S S S S S S S
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
S S S S S S S S S S S S S S S S S S S S S S S S
BYTE 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
The operand data formats supported by the integer unit are standard
two’s-complement data formats. The operand size for each instruction is
either explicitly encoded in the instruction (load/store instructions) or
implicitly defined by the instruction operation (index operations, byte
extraction). Typically, instructions operate on all 32 bits of the source
operand(s) and generate a 32-bit result.
Memory is viewed from a big-endian byte ordering perspective. The
most significant byte (byte 0) of word 0 is located at address 0. Bits are
numbered within a word starting with bit 31 as the most significant bit.
Figure 6-4. Data Organization in Registers
Figure 6-3. Data Organization in Memory
Freescale Semiconductor, Inc.
M•CORE M210 Central Processor Unit (CPU)
For More Information On This Product,
BYTE 1
BYTE 5
BYTE 9
BYTE D
BYTE 1
Go to: www.freescale.com
16 15
16 15
BYTE 2
BYTE 6
BYTE A
BYTE E
S
BYTE 2
HALF-WORD
HALF-WORD
8 7
8 7
BYTE 3
BYTE 7
BYTE B
BYTE F
M•CORE M210 Central Processor Unit (CPU)
S
BYTE 3
BYTE
BYTE
0
0
0
0
0
0
WORD AT 0X0000 000 0
WORD AT 0X0000 000 4
WORD AT 0X0000 000 8
WORD AT 0X0000 000 C
WORD
SIGNED BYTE
UNSIGNED BYTE
UNSIGNED
HALF-WORD
SIGNED
HALF-WORD
Data Format Summary
Technical Data
149