MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 242

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Clock Module
10.8.4.2 Loss-of-Clock Reset
Technical Data
242
NRM
NRM
REF
SCM
SCM
SCM
SCM
MODE
PLL = PLL enabled during STOP mode. PLL = On when STPMD[1:0] = 00 or 01
OSC = OSC enabled during STOP mode. OSC = On when STPMD[1:0] = 00, 01, or 10
MODES
LOCKS
LOCS
In
NRM = normal PLL crystal clock reference or normal PLL external reference or PLL 1:1 mode. During PLL 1:1 or normal
EXT = external clock mode
REF = PLL reference mode due to losing PLL clock or lock from NRM mode
SCM = PLL self-clocked mode due to losing reference clock from NRM mode
RESET = immediate reset
‘LK = expecting previous value of LOCKS before entering stop
0–>‘LK = current value is 0 until lock is regained which then will be the previous value before entering stop
0–> = current value is 0 until lock is regained but lock is never expected to regain
‘LC = expecting previous value of LOCS before entering stop
1–>‘LC = current value is 1 until clock is regained which then will be the previous value before entering stop
1–> = current value is 1 until clock is regained but CLK is never expected to regain
1 1 0 On On 1
1 1 1 On On X
1 0 0
1 0 0 Off
1 0 0 Off
1 0 0 On On 0
1 0 0 On On 1
external reference mode, the oscillator is never enabled. Therefore, during these modes, refer to the OSC = On
case regardless of STPMD values.
X
X
X
X
X
0 PLL disabled
1 PLL disabled
Action at Stop
Table 10-8. Stop Mode Operation (Sheet 3 of 3)
Expected PLL
When a loss-of-clock condition is recognized, reset is asserted if the
LOCRE bit in SYNCR is set. The LOCS bit in SYNSR is cleared after
reset. Therefore, the LOC bit must be read in RSR to determine that a
loss of clock condition occurred. LOCRE has no effect in external clock
mode.
To exit reset in PLL mode, the reference must be present, and the PLL
must acquire lock.
Freescale Semiconductor, Inc.
For More Information On This Product,
Lose clock
Lose lock
Lose lock, regain
Lose clock or lock
Lose reference clock
Regain SCM
Regain SCM
Lose reference clock
Lose reference clock
During Stop
PLL Action
Go to: www.freescale.com
Clock Module
NRM
RESET
Unstable NRM
NRM
NRM
RESET
REF
Stuck
SCM
SCM
SCM
SCM
SCM
SCM
MODE
Out
‘LK
‘LK
0
0
0
0
0
0
0
0–>1
X
1
1
1
0
0
0
0
‘LC
‘LC
‘LC
‘LC
1
1
1
1
1
Reset immediately
Reset immediately
Wakeup without lock
Wakeup without lock
MMC2107 – Rev. 2.0
Comments
MOTOROLA

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