MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 495

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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18.11.6 Analog Input Considerations
MMC2107 – Rev. 2.0
MOTOROLA
The current into the pin (I
determined by these equations:
where:
The current into (I
coupling ratio) of the parasitic bipolar transistor (K
expressed by this equation:
where:
A method for minimizing the impact of stress conditions on the QADC is
to strategically allocate QADC inputs so that the lower accuracy inputs
are adjacent to the inputs most likely to see stress conditions.
Also, suitable source impedances should be selected to meet design
goals and minimize the effect of stress conditions.
The source impedance of the analog signal to be measured and any
intermediate filtering should be considered whether external
multiplexing is used or not.
typical analog signal sources to one QADC analog input pin through a
separate multiplexer chip. Also, an example of an analog signal source
connected directly to a QADC analog input channel is displayed.
V
V
V
R
R
I
I
Freescale Semiconductor, Inc.
In
INJ
Stress
EB
BE
Stress
Selected
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
= – K
is either I
N
= Adjustable voltage source
= Parasitic PNP emitter/base voltage
= Parasitic NPN base/emitter voltage
= Source impedance (10 K resistor in
= Source impedance on channel selected for conversion
Go to: www.freescale.com
* I
INJ
INJN
Figure 18-52
In
) the neighboring pin is determined by the K
or I
I INJP
INJP
I INJN
INJN
Figure 18-53
.
or I
=
=
on stressed channel)
V
-------------------------------------------------------------- -
---------------------------------------------- -
INJP
Stress
V
Queued Analog-to-Digital Converter (QADC)
Stress
) under negative or positive stress is
R Stress
R Stress
V
EB
shows the connection of eight
V
BE
Pin Connection Considerations
V
DDA
N
Figure 18-51
‹‹ 1). The I
Technical Data
N
In
(current
can be
and
495

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