MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 447

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

MMC2107 – Rev. 2.0
MOTOROLA
V
V
PQA4
PQA0
PQB3
PQB0
SSA
V
V
DDA
RH
RL
ANALOG
POWER
10-BIT A/D CONVERTER
Figure 18-19. QADC Analog Subsystem Block Diagram
10-BIT RC
DAC
Therefore, conversion time requires a minimum of 14 QCLK clocks (7 s
with a 2.0-MHz QCLK). If the maximum final sample time period of 16
QCLKs is selected, the total conversion time is 28 QCLKs or 14 s (with
a 2.0-MHz QCLK).
QCLK
Freescale Semiconductor, Inc.
COMPAR-
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
CHAN. DECODE & MUX
ATOR
2 CYCLES
BUFFER
SAMPLE
TIME:
SAMPLE
BUFFER
SAMPLE TIME
8: 1
Go to: www.freescale.com
INPUT
CSAMP
N CYCLES
(2,4,8,16)
SAMPLE
FINAL
TIME:
Figure 18-20. Conversion Timing
APPROXIMATION
INTERNAL
CHANNEL
DECODE
4
SUCCESSIVE
STATE MACHINE & LOGIC
REGISTER
10
SUCCESSIVE APPROXIMATION RESOLUTION SEQUENCE
SAR TIMING
BIAS CIRCUIT
10
POWER
DOWN
Queued Analog-to-Digital Converter (QADC)
RESOLUTION
10 CYCLES
TIME:
2
Functional Description
STOP
RST
QCLK
IST
START CONV.
END OF CONV.
SAR[9:0]
BYP
CHAN[5:0]
Technical Data
447