s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 11
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 11 of 382
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S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
NOTE:
SEG48–SEG79
SEG80–SEG87
COM8–COM15
SEG0–SEG47
COM0–COM7
XT
Pin Name
CIN0–CIN2
V
X
LC1
RESET
LCDFR
TCLO0
TCLO1
IN
IN
CLO1
CLO2
TEST
TCL0
TCL1
INT0
INT1
INT2
INT4
V
V
,
,
CL
M
–V
X
XT
Pull-up resistors for all I/O ports are automatically disabled if they are configured to output mode.
DD
SS
OUT
OUT
LC5
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Table 1-1. S3C72M5/C72M7/C72M9 Pin Descriptions (Continued)
O
O
O
O
O
–
–
–
–
–
I
I
I
I
I
I
External interrupts with rising/falling edge detection
External interrupts with rising/falling edge detection
External quasi-interrupts with rising/falling edge
detection
External interrupts with rising/falling edge detection
Alternated signal for SEG driver
Synchronous frame signal for SEG driver
Clock output or operating clock for SEG driver
Clock output or operating clock for SEG driver
Data shift clock for SEG driver
Timer/counter0 clock output
Timer/counter1 clock output
External clock input for timer/counter 0
External clock input for timer/counter 1
CIN0,1: comparator input only
CIN2: comparator input or external reference input
LCD segment data output
LCD segment data output
LCD segment data output
LCD common data output
LCD common data output
LCD power supply. Voltage dividing resistors are fixed.
Main power supply
Ground
Crystal, Ceramic, or RC oscillator signal I/O for main
system clock.
Crystal oscillator signal I/O for subsystem clock.
Test signal input (must be connected to V
Reset signal
Description
SS
)
Number
128–123
123–128
122–75
40, 41
23, 22
25, 26
74–43
15–11
10–3
2,1,
1, 2
28
29
30
31
32
33
34
35
36
36
37
38
39
42
20
21
24
27
PRODUCT OVERVIEW
Share Pin
SEG87–80
P4.0–P4.1
COM15–8
Port13–6
P1.0
P1.1
P1.2
P1.3
P2.0
P2.1
P2.2
P2.3
P3.0
P3.0
P3.1
P3.2
P3.3
P4.2
–
–
–
–
–
–
–
–
–
1-11
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