s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 314

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

LCD CONTROLLER/DRIVER
LCD MODE REGISTER (LMOD)
The LCD mode control register LMOD is used to control display mode; LCD clock, segment or port output, and
display on/off. LMOD can be manipulated using 8-bit write instructions.
The LCD clock signal, LCDCK, determines the frequency of COM signal scanning of each segment output. This is
also referred to as the 'frame frequency. Since LCDCK is generated by dividing the watch timer clock (fw), the watch
timer must be enabled when the LCD display is turned on. RESET clears the LMOD register values to logic zero.
The LCD display can continue to operate during idle and stop modes if a subsystem clock is used as the watch
timer source. The LCD mode register LMOD controls the output mode of the 32 pins used for normal outputs (P6.0–
P13.3). Bits LMOD.7–.4 define the segment output and normal bit output configuration.
NOTE:
12-6
F8CH
F8DH
Display Duty Cycle
LMOD.3
LMOD.7
1/16
1/8
COM0
Table 12-4. LCD Clock Signal (LCDCK) Frame Frequency
LCDCK
LMOD.2
LMOD.6
1 Frame
256 Hz
LMOD.1
LMOD.5
32
–
LMOD.0
LMOD.4
512 Hz
64
32
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
1024 Hz
128
64
2048 Hz
256
128
4096 Hz
256
–