s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 55

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
MEMORY MAP
4
MEMORY MAP
OVERVIEW
To support program control of peripheral hardware, I/O addresses for peripherals are memory-mapped to bank 15 of
the RAM. Memory mapping lets you use a mnemonic as the operand of an instruction in place of the specific
memory location.
Access to bank 15 is controlled by the select memory bank (SMB) instruction and by the enable memory bank flag
(EMB) setting. If the EMB flag is "0", bank 15 can be addressed using direct addressing, regardless of the current
SMB value. 1-bit direct and indirect addressing can be used for specific locations in bank 15, regardless of the
current EMB value.
I/O MAP FOR HARDWARE REGISTERS
Table 4-1 contains detailed information about I/O mapping for peripheral hardware in bank 15 (register locations
F80H–FFFH). Use the I/O map as a quick-reference source when writing application programs. The I/O map gives
you the following information:
— Register address
— Register name (mnemonic for program addressing)
— Bit values (both addressable and non-manipulable)
— Read-only, write-only, or read and write addressability
— 1-bit, 4-bit, or 8-bit data manipulation characteristics
4-1