s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 280

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

TIMERS and TIMER/COUNTERS
TC1 COUNTER REGISTER (TCNT1)
The 16-bit counter register for timer/counter 1, TCNT1, is mapped to RAM addresses FA5H–FA4H (TCNT1A) and
FA7H–FA6H (TCNT1B). The two 8-bit registers are read-only and can be addressed by 8-bit RAM control
instructions. RESET sets all TCNT1 register values to logic zero (00H).
Whenever TMOD1A.2 and TMOD1A.3 are enabled, TCNT1 is cleared to logic zero and counting begins. The TCNT1
register value is incremented each time an incoming clock signal is detected that matches the signal edge and
frequency setting of the TMOD1A register (specifically, TMOD1A.6, TMOD1A.5, and TMOD1A.4).
Each time TCNT1 is incremented, the new value is compared to the reference value stored in the TC1 reference
register, TREF1. When TCNT1 = TREF1, an overflow occurs in the TCNT1 register, the interrupt request flag, IRQT1,
is set to logic one, and an interrupt request is generated to indicate that the specified timer/counter interval has
elapsed.
11-32
TREF1
TCNT1
Timer Start Instruction
Count
Clock
TOL1
(TMOD1.3 is set)
0
1
2
Figure 11-5. TC1 Timing Diagram
n-1
IRQT1 Set
n
Reference Value = n
Match
0
1
Interval Time
2
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
n-1
IRQT1 Set
n
Match
0
1
2
3