s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 97
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 97 of 382
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S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
TMOD0
Bit
Identifier
RESET Value
Read/Write
Bit Addressing
TMOD0.7
TMOD0.6–.4
TMOD0.3
TMOD0.2
TMOD0.1
TMOD0.0
— Timer/Counter 0 Mode Register
Bit 7
Timer/Counter 0 Input Clock Selection Bits
Clear Counter and Resume Counting Control Bit
Enable/Disable Timer/Counter 0 Bit
Bit 1
Bit 0
0
0
0
1
1
1
1
1
0
1
0
0
"0"
W
7
0
8
Always logic zero
Clear TCNT0, IRQT0, and TOL0 and resume counting immediately
(This bit is cleared automatically when counting starts.)
Disable timer/counter 0; retain TCNT0 contents
Enable timer/counter 0
Always logic zero
Always logic zero
0
0
0
0
1
1
0
1
0
1
0
1
W
.6
6
0
8
External clock input (TCL0) on rising edge
External clock input (TCL0) on falling edge
fxx/2
fxx/2
fxx/2
fxx = 4.19 MHz
10
6
4
= 65.5 kHz
= 262 kHz
= 4.09 kHz
W
.5
5
0
8
W
.4
4
0
8
1/8
W
.3
3
0
T/C0
W
.2
2
0
8
"0"
W
1
0
8
F91H, F90H
MEMORY MAP
"0"
W
0
0
8
4-43
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