s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 63

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s3c72m9

Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
CLMOD1
Bit
Identifier
RESET Value
Read/Write
Bit Addressing
CLMOD1.3
CLMOD1.2
CLMOD1.1–.0
NOTE:
"fx" is the main clock and "fxt" is the sub clock, given a clock frequency of 4.19 MHz and 32.768 kHz, respectively.
— Clock Output Mode 1 Register
Enable/Disable Clock Output Control Bit
Bit 2
Clock Source and Frequency Selection Control Bits
0
1
0
0
0
1
1
W
.3
3
0
4
Disable clock output (CLO1, CLO2)
Enable clock output (CLO1, CLO2)
Always logic zero
0
1
0
1
Select CPU clock source fx/4, fx/8, fx/64, or fxt/4 (1.05 MHz, 524 kHz, 65.5
kHz or 8.19 kHz)
Select clock fx/8 (524 kHz) or fxt (4.09 kHz)
Select clock fxx/16 (262 kHz) or fxt (2.05 kHz)
Select clock fxx/64 (65.5 kHz) or fxt (512 Hz)
"0"
W
2
0
4
W
.1
1
0
4
W
.0
0
0
4
CPU
MEMORY MAP
FD0H
4-9

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