s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 263

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
TC0 CLOCK FREQUENCY OUTPUT
Using timer/counter 0, a modifiable clock frequency can be output to the TC0 clock output pin, TCLO0. To select the
clock frequency, load the appropriate values to the TC0 mode register, TMOD0. The clock interval is selected by
loading the desired reference value into the reference register TREF0. To enable the output to the TCLO0 pin, the
following conditions must be met:
— TC0 output enable flag TOE0 must be set to "1"
— I/O mode flag for P3.0 (PM3.0) must be set to output mode ("1")
— Output latch value for P3.0 must be set to "0"
In summary, the operational sequence required to output a TC0-generated clock signal to the TCLO0 pin is as
follows:
1. Load a reference value to TREF0.
2. Set the internal clock frequency in TMOD0.
3. Initiate TC0 clock output to TCLO0 (TMOD0.2 = "1").
4. Set P3.0 mode flag (PM3.0) to "1".
5. Set P3.0 output latch to "0".
6. Set TOE0 flag to "1".
Each time TCNT0 overflows and an interrupt request is generated, the state of the output latch TOL0 is inverted and
the TC0-generated clock signal is output to the TCLO0 pin.
F
Output a 30 ms pulse width signal to the TCLO0 pin:
PROGRAMMING TIP — TC0 Signal Output to the TCLO0 Pin
BITS
SMB
LD
LD
LD
LD
LD
LD
BITR
BITS
EMB
15
EA,#79H
TREF0,EA
EA,#4CH
TMOD0,EA
EA,#01H
PMG2,EA
P3.0
TOE0
; P3.0
; P3.0 clear
output mode
TIMERS and TIMER/COUNTERS
11-15