s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 295
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s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 295 of 382
- Download datasheet (2Mb)
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
TIMER/COUNTER 1B FUNCTION SUMMARY
8-bit programmable timer
TIMER/COUNTER 1B COMPONENT SUMMARY
Mode register (TMOD1B)
Reference register (TREF1B)
Counter register (TCNT1B)
Clock selector circuit
8-bit comparator
Output latch (TOL2)
Interrupt request flag (IRQT2)
Interrupt enable flag (IET2)
Register
TMOD1B
TCNT1B
TREF1B
Name
TOL2
Reference
Counter
Control
Type
Flag
Controls TC1B enable/disable
(bit 2); clears and resumes
counting operation (bit 3); sets
input clock and the clock
frequency (bits 6–4)
Counts clock pulses matching
the TMOD1B frequency setting
Stores reference value for TC1B
interval setting
TC1B output latch
Activates the timer/counter and selects the internal clock frequency.
Stores the reference value for the desired number of clock pulses between
interrupt requests.
Counts internal clock pulses that are generated based on bit settings in the
mode register and reference register.
Together with the mode register (TMOD1B), lets you select one of four internal
clock frequencies.
Determines when to generate an interrupt by comparing the current value of the
counter (TCNT1B) with the reference value previously programmed into the
reference register (TREF1B).
When the contents of the TCNT1B and TREF1B registers coincide, the
timer/counter interrupt request flag (IRQT2) is set to "1", the status of TOL2 is in-
verted, and an interrupt is generated.
Cleared when TC1B operation starts and set to logic one whenever the counter
value and reference value match.
Must be set to logic one before the interrupt requests generated by timer/counter
1B can be processed.
Generates interrupts at specific time intervals based on the selected clock
frequency.
Table 11-16. TC1 Register Overview
Description
Size
8-bit
8-bit
8-bit
1-bit
FAAH–FABH
FA2H–FA3H
FA6H–FA7H
Address
F92H.0
RAM
TIMERS and TIMER/COUNTERS
8-bit write-only;
8-bit write-only
(TMOD1B.3 is
8-bit read-only
1-bit read-only
Addressing
writeable)
also 1-bit
Mode
Value
Reset
FFH
"0"
"0"
"0"
11-47
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