s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 176

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s3c72m9

Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
SAM47 INSTRUCTION SET
NOP —
NOP
Operation:
Description:
Example:
5-72
Three NOP instructions follow the STOP instruction to provide a short interval for clock stabilization
before power-down mode is initiated:
STOP
NOP
NOP
NOP
No Operation
No operation is performed by a NOP instruction. It is typically used for timing delays.
One NOP causes a 1-cycle delay: with a 1 µs cycle time, five NOPs would therefore cause a 5 µs
delay. Program execution continues with the instruction immediately following the NOP. Only the
PC is affected. At least three NOP instructions should follow a STOP or IDLE instruction.
Operand
Operand
1
0
1
Binary Code
Operation Summary
0
No operation
0
0
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
0
0
Operation Notation
No operation
Bytes
1
Cycles
1

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