s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 46
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 46 of 382
- Download datasheet (2Mb)
ADDRESSING MODES
DIRECT AND INDIRECT ADDRESSING
1-bit, 4-bit, and 8-bit data stored in data memory locations can be addressed directly using a specific register or bit
address as the instruction operand.
Indirect addressing specifies a memory location that contains the required direct address. The S3C7 instruction set
supports 1-bit, 4-bit, and 8-bit indirect addressing. For 8-bit indirect addressing, an even-numbered RAM address
must always be used as the instruction operand.
1-BIT ADDRESSING
NOTE
3-6
@H + DA.b
memb.@L
Operand
Notation
mema.b
:
DA.b
'x' means don't care.
Direct: bit is indicated by the
RAM address (DA), memory
bank selection, and specified
bit number (b).
Direct: bit is indicated by ad-
dressable area (mema) and bit
number (b).
Indirect: lower two bits of reg-
ister L as indicated by the up-
per 10 bits of RAM area
(memb) and the upper two bits
of register L.
Indirect: bit indicated by the
lower four bits of the address
(DA), memory bank selection,
and the H register identifier.
Addressing Mode
Description
Table 3-2. 1-Bit Direct and Indirect RAM Addressing
EMB Flag
Setting
0
1
x
x
0
1
Addressable
FB0H–FBFH
FF0H–FFFH
FC0H–FFFH
F80H–FFFH
000H–FFFH
000H–FFFH
000H–07FH
000H–0FFH
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
Area
SMB = 0, 1–
SMB = 0, 1–
13, 14, 15
13, 14, 15
Memory
Bank 15
Bank 15
Bank 15
Bank 0
Bank 0
Bank
ERB, IEx, IRQx,
IS0, IS1, EMB,
Hardware I/O
addressable
addressable
(SMB = 15)
(SMB = 15)
peripherals
peripherals
Mapping
All 1-bit
BSCn.x
All 1-bit
Pn.n
Pn.n
–
–
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