s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 80

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

MEMORY MAP
LMOD
Bit
Identifier
RESET Value
Read/Write
Bit Addressing
LMOD.7–.4
NOTE: Segment pins that can be used for normal I/O should be configured to output mode
LMOD.3–.2
NOTE: LCDCK is supplied only when the watch timer operates. To use the LCD controller,
LMOD.1–.0
4-26
bit 2 in the watch mode register WMOD should be set to 1.
for the SEG function.
— LCD Mode Register
LCD Output Segment and Pin Configuration Bits
LCD Clock (LCDCK) Frequency Selection Bits
LCD Display Mode Selection Bits
0
0
0
0
0
0
0
0
1
0
0
1
1
0
0
1
W
.7
7
0
8
0
0
0
0
1
1
1
1
0
0
1
0
1
0
1
1
0
0
1
1
0
0
1
1
0
When 1/8 duty: fxx/2
When 1/8 duty: fxx/ 2
When 1/8 duty: fxx/2
When 1/8 duty: fxx/2
All LCD dots off
All LCD dots on
Normal display
0
1
0
1
0
1
0
1
0
W
.6
6
0
8
P6–13; SEG port
P7–13; SEG port, P6; normal I/O port
P8–13; SEG port, P6, 7; normal I/O port
P9–13; SEG port, P6–8; normal I/O port
P10–13; SEG port, P6–9; normal I/O port
P11–13; SEG port, P6–10; normal I/O port
P12–13; SEG port, P6–11; normal I/O port
P13; SEG port, P6–12; normal I/O port
P6–13; normal I/O port
W
.5
5
0
8
7
5
4
6
(256 Hz); when 1/16 duty: fxx/2
(1024 Hz); when 1/16 duty: fxx/2
(2048 Hz); when 1/16 duty: fxx/2
(512 Hz); when 1/16 duty: fxx/2
W
.4
4
0
8
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
W
.3
3
0
8
LCD
W
.2
2
0
8
6
5
4
3
(512 Hz)
(1024 Hz)
(2048 Hz)
(4096 Hz)
W
.1
1
0
8
F8DH, F8CH
W
.0
0
0
8