s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 89
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 89 of 382
- Download datasheet (2Mb)
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
PNE1
Bit
Identifier
RESET Value
Read/Write
Bit Addressing
.7
.6
.5
.4
.3
.2
.1
.0
— N-Channel Open-Drain Mode Register 1
P2.3 N-Channel Open-Drain Configurable Bit
P2.2 N-Channel Open-Drain Configurable Bit
P2.1 N-Channel Open-Drain Configurable Bit
P2.0 N-Channel Open-Drain Configurable Bit
P0.3 N-Channel Open-Drain Configurable Bit
P0.2 N-Channel Open-Drain Configurable Bit
P0.1 N-Channel Open-Drain Configurable Bit
P0.0 N-Channel Open-Drain Configurable Bit
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
W
.7
7
0
8
Configure P2.2 as a push-pull
Configure P2.2 as a n-channel open-drain
Configure P2.1 as a push-pull
Configure P2.1 as a n-channel open-drain
Configure P2.0 as a push-pull
Configure P2.0 as a n-channel open-drain
Configure P0.3 as a push-pull
Configure P0.3 as a n-channel open-drain
Configure P0.2 as a push-pull
Configure P0.2 as a n-channel open-drain
Configure P0.1 as a push-pull
Configure P0.1 as a n-channel open-drain
Configure P0.0 as a push-pull
Configure P0.0 as a n-channel open-drain
Configure P2.3 as a push-pull
Configure P2.3 as a n-channel open-drain
W
.6
6
0
8
W
.5
5
0
8
W
.4
4
0
8
W
.3
3
0
8
W
.2
2
0
8
I/O
W
.1
1
0
8
FD7H, FD6H
MEMORY MAP
W
.0
0
0
8
4-35
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