s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 60

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s3c72m9

Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
MEMORY MAP
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
REGISTER DESCRIPTIONS
In this section, register descriptions are presented in a consistent format to familiarize you with the memory-mapped
I/O locations in bank 15 of the RAM. Figure 4-1 describes features of the register description format. Register
descriptions are arranged in alphabetical order. Programmers can use this section as a quick-reference source when
writing application programs.
Counter registers, buffer registers, and reference registers, as well as the stack pointer and port I/O latches, are not
included in these descriptions. More detailed information about how these registers are used is included in Part II of
this manual, "Hardware Descriptions," in the context of the corresponding peripheral hardware module descriptions.
4-6

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