s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 286

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

TIMERS and TIMER/COUNTERS
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
TC1A ENABLE/DISABLE PROCEDURE
Enable Timer/Counter 1A
— Set the TC1A interrupt enable flag IET1 to logic one
— Set TMOD1A.3 to logic one
TCNT1A, IRQT1, and TOL1 are cleared to logic zero, and timer/counter operation starts.
Disable Timer/Counter 1A
— Set TMOD1A.2 to logic zero
Clock signal input to the counter register TCNT1A is halted. The current TCNT1A value is retained and can be read if
necessary.
TC1A PROGRAMMABLE TIMER/COUNTER FUNCTION
Timer/counter 1A can be programmed to generate interrupt requests at variable intervals, based on the system clock
frequency you select. The 8-bit TC1A mode register, TMOD1A, is used to activate the timer/counter and to select
the clock frequency; the 8-bit reference register, TREF1A, is used to store the value for the desired number of clock
pulses between interrupt requests. The 8-bit counter register, TCNT1A, counts the incoming clock pulses, which are
compared to the TREF1A value. When there is a match, an interrupt request is generated.
To program Timer/counter 1A to generate interrupt requests at specific intervals, select one of the four internal clock
frequencies (divisions of the system clock, fxx) and load a counter reference value into the TREF1A register.
TCNT1A is incremented each time an internal counter pulse is detected with the reference clock frequency specified
by TMOD1A.4–TMOD1A.6 settings. To generate an interrupt request, the TC1A interrupt request flag (IRQT1) is set
to logic one, the status of TOL1 is inverted, and the interrupt is output. The content of TCNT1A is then cleared to
00H, and TC1A continues counting. The interrupt request mechanism for TC1A includes an interrupt enable flag
(IET1) and an interrupt request flag (IRQT1).
TC1A TIMER/COUNTER OPERATION SEQUENCE
The general sequence of operations for using TC1A can be summarized as follows:
1. Set TMOD1A.7 to "0" to be operated as timer/counter 1A, 1B.
2. Set TMOD1A.2 to "1" to enable TC1A.
3. Set TMOD1A.6 to "1" to enable the system clock (fxx) input.
4. Set TMOD1A.5 and TMOD1A.4 bits to desired internal frequency (fxx/2 n ).
5. Load a value to TREF1A to specify the interval between interrupt requests.
6. Set the TC1A interrupt enable flag (IET1) to "1".
7. Set TMOD1A.3 bit to "1" to clear TCNT1A, IRQT1, and TOL1, and start counting.
8. TCNT1A increments with each internal clock pulse.
9. When the comparator shows TCNT1A = TREF1A, the IRQT1 flag is set to "1" and an interrupt request is
generated.
10. Output latch (TOL1) logic toggles high or low.
11. TCNT1A is cleared to 0000H and counting resumes.
12. Programmable timer/counter operation continues until TMOD1A.2 is cleared to "0".
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